This Blog is started to spread knowledge to people about disruptive technology. We all have to keep in mind technology is only a part of life and it is not everything.
I will share latest tech in semiconductor Industry and interview questions
Techie Foulders
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Hi guys, this is Vishnu from Techie Foulders. Our initiative is to make you my friends get latest updates of technology
What are the Blocks Present in an Amplifier? Differential Amplifier Current Mirror Current Sink Resistor & Capacitors. What are the Factors considered while Matching Amplifier? Routing is equidistant Dummy Variation is minimized both x & Y axis What are the Factors considered while Floor Planning from Scratch? Important->>Input and Output taken where signals come so that they don’t cross over each other Guard rings->> latch UP Signal flow Matching Why do we put guard rings around devices? To prevent latch up. To reduce resistance (make less chance of ON transistor) Prevention to overcome Latch Up? Use guard rings->> to reduce resistance. SOI What happens if more Current occurs during latch up? Creates destruction of device & short Which signal will you shield clock/biasing? Clock more switching takes place so we go for shielding biasing. Explain Antenna effect. If we have violation in M...
(1st round -- 45 minutes)** 1) Introduce myself. 2) Operation of MOSFET. 3)Types of MOSFET. 4) What is the difference between BJT, MOSFET and CMOS. 5) Why CMOS. 6) Why cmos for low power applications. 7) Basics questions on current equation of MOSFET. 8) basic questions on layers of MOSFET. 9) What is threshold voltage. 10) some questions on equation of threshold voltage. 11) PVT parameters. 12) what is the secondary effects. 13) Voltage divider rule. 14) series circuit operation. 15) parallel circuit operation. 16) oscillator operation. 17) universal gates. 18) Realization of XOR and XNOR using NAND and NOR gates. 19) Which has highest area NAND or NOR and Why. \20) ASIC vs SOC. (2nd round --- 45 minutes )* 1) Introduce myself. 2) Complete PD flow. 3) inputs to the PD tool. 4) Some commands on Innovus tool. 5) what are the end cap cells w...
1) What is FPGA ? 2) What is difference between ASIC and FPGA ? 3) Can we replace FPGA with ASIC ? 4) What FPGA consists of actually ? 5) Tell the flow of FPGA like how we will implement a code on FPGA ? 6) What are Universal gates? Implemented NOR gate using Nand gate? Is Mux Universal gate ? If yes implement And & Or gates using 2:1 mux ? 7) Basic diff between Latch & FF ? 8) Make a D latch using 2:1 Mux ? 9) Implement the ckt for 101 pattern detecting don't use the FSM but implement in sequential ? 10) Draw the CMOS gate for 2-input Nand & 2-input Nor gates ? 11) What are synthesizable and unsynthesizable constructs in Verilog? which one will be used when ? 12) Write verilog code for up-down counter? 14) Why Nand gate is preferable over Nor gate ? 15) Draw 3-bit Ring and Johnson Counter along with their States ?
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