Micron Serdes Interview (3+ Experience)

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 Interview Questions

1. Blocks done in 65nm SERDES (Custom Digital, hyst_buf, Voltage Regulator)

2. Challenges faced in the Blocks of SERDES     

3. What was the Current (Electro Migration)

4. Which was the tool used to run Electro Migration

5. Are you aware of Latch Up issue? Did you get any DRC for Latch Up?

6. Explain Floor Plan with Schematic and Layout

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