Synopsys Campus Interview Question 2021

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Synopsys Campus Interview 2021 Questions

Tell me about u r self.

Round 1:

1)Difference between latch and ff.

2) write a Verilog code for the right shift and left shift depends on sel input.

3)D latch Verilog code.

4) normal dff  verilogcode

5)DFF working 

6) difference between ASIC and FPGA

7) using dff(if en is there (dout =din) or if en is no there  it holds the previous value)

8) In DFF use only if the latch is infer r not


 Round 2: ( 30 minutes )

1. What is verification and why do we use UVM.

2. Explain the first concept that I understood in UVM.

3. What is FSM

4. Design an FSM for traffic light controllers.

5. Design an FSM for sequence 1011.

6. Difference between Mealy and Moore in terms of the structure of sequence 1011.

7. What are user-defined data types in C.

8. Tell the output of the code snippet.

int arr[ ] = {1,11,21,31,51 };
int *p = &arr;
Print("%d", *p++);
Print("%d", *p);
Print("%d", *++p);
Print("%d", *p);
Print("%d", *(p++));

9. How much memory is storing the data types

struct struct_name{
int p;
*struct struct_name }

10. What is the keyword static, const.

11. What is call by value and call by reference.

12. What happens under an interrupt in the processor.


Round 3: ( 45 minutes )

1. Design an up counter in a synchronous way.

2. Now design an up counter without using any combinational component.

3. Using the same techniques design the Dow counter ( checking the logic of how you design ).

4. Design the counter with sequence 0-1-2-3-3-2-1-0.

5. What is the Ring counter, design it.

5. What is the circuitry for 1st order LPF.

6. Why does a transmission line imitate the first order LPF.

7. In C, how will you perform power operation without using pow(x,y), how will you implement it on processor what components are used in the design.

8. Explain the process of stacking in memory.

9. What is cache memory, and its mapping techniques.

10. What is firmware.

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