Analog Layout (3.5 Years)

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Round - 1
1. Self Introduction
2. Higher and lower nodes differences
3. WPE, STI, LOD
4. CMOS Latchup
5. Projects Explanation & it's Constraints
Round - 2
1. EM & IR
2. Types of LVS Errors
3. Antenna Effect
4. Softchecks
5. ERC
6. Double Patterning
Round-3
1. Network Analysis
2. How to prevent magnetic field coupling to the clock signals
3. Types of Shielding

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