Synopsys intern -2021 (Digital Design Role)

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1) CMOS inverter characteristics ( significant of Id and Vds ) 

2) More questions on power dissipation in CMOS ( leakage current ) and how to reduce dynamic and static power dissipation. 

3) What are the challenges in deep sub micron?

4) Written test questions discussion ( only technical ) .

5) Academic projects .

6) About synthesis ( logical and physical synthesis ) .

7) Inputs for synthesis , write any 3 .sdc 

8) Source of clock , difference between generated clock and master clock . They will give you one scenario about to this . 

9) Why transmission gates are not preferred in design ( very less ) 

10) Setup , hold , skew fixing of setup and hold timing. 

11) Setup can negative ? How to fix negative setup.

12) Based on the resume they will ask tool related questions ( only flow )

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