VIT Campus Interview Questions -2021 (Intel, Synopsys, AMD, ALL)

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Set-A
  1.  Project
  2. Hold 
  3. Setup
  4. Holdviolation 
  5. Brief project
  6. Intterupt
  7. Latch
  8. FF
  9. Design flow
  10. Pointer 
  11. Data type in c
  12. Null pointer
  13. Static variable
  14. Dynamic variable diff
  15. Mealy Moore application
  16. Which is faster
  17. Diff used 
  18. STA
  19. Sync reset 
  20. Async rese

Set-B

  1. What is verilog A and verilog Ams
  2. Seriel protocols
  3. Thermometer coding
  4. Gray coding
  5. Set up and hold how to resolve 
  6. LRC circuit
  7. What is amplification
Set-C

  1. How to fix IR drop without using straps
  2. How to fix setup violation without using buffer
  3. What is tie high and tie low 
  4. What is anteena effect
  5. How to make latch to flipflop
Set-D
  1. Bjt 
  2. Differences between bjt and MOSFET
  3. Why mosfet whynot  bjt
  4. Diff amplifier concepts
  5. Opamp gains
  6. Verilog coding styles
  7. Some puzzles like aptitude
  8. Some microprocessor concepts 
Set-E
  1.  Projects in details
  2. Implement verilog code for LCM of two 16 bit numbers
  3. Aptitude Q based on Speed time distance (two trains with different speed and starting with different delay with both different distances reaching same point)
  4. What is an interrupt
  6. What's difference between blocking and non blocking
  7. Difference between latch and FF
  8. Difference between mealy and moore
  9. OOP concepts
  10. Verification environment
  11. System Verilog concepts on data types
  12. Basic structure of a verilog code
  13. Python basics
  14. Perl basics
  15. Questions on projects
  16. Setup and hold
  17. Power dissipation concepts

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